000			03958nam a2200301 i 4500
003			OSt
005			20250225091804.0
008			250224s2020 ||||| |||| 00| 0 eng d
020			_a9781119621638 _qebook
040			_cuoc _duoc _erda
082			_223 _a621.392 _bRAF
100	1		_aRAFIQUZZAMAN, MOHAMED _eauthor. _94448
245	1		_aDigital logic : _bwith an introduction to Verilog and FPGA-based design/ _cMohamed Rafiquzzaman, Steven A. McNinch
264		1	_aHoboken, NJ : _bJohn Wiley & Sons, Inc., Danvers, MA, _c2020
300			_a1 online resource, 444 pages : _billustrations; digital, PDF file
336			_2rdacontent _atext _btxt
337			_2rdamedia _acomputer _bc
338			_2rdacarrier _aonline resource _bcr
347			_2rda _atext file _bPDF
500			_aincludes index
520			_aCover -- Title Page -- Copyright -- Contents -- Preface -- Chapter 1: Introduction to Digital Systems -- 1.1 Explanation of Terms -- 1.2 Design Levels -- 1.3 Combinational vs. Sequential Systems -- 1.4 Digital Circuits -- 1.4.1 Diodes -- 1.4.2 Transistors -- 1.4.3 MOS Transistors -- 1.5 Integrated Circuits (ICs -- 1.6 CAD (Computer-Aided Design -- 1.7 Evolution of Digital Logic, Microprocessors, and Microcontrollers -- 1.8 A Typical Application of a Digital System such as a Microcontroller -- Chapter 2: Number Systems, Arithmetic/Logic Operations, and Codes -- 2.1 Number Systems 2.1.1 General Number Representation -- 2.1.2 Converting Numbers from One Base to Another -- 2.2 Unsigned and Signed Binary Numbers -- 2.3 Codes -- 2.3.1 Binary-Coded-Decimal Code (8421 Code -- 2.3.2 Alphanumeric Codes -- 2.3.3 Excess-3 Code -- 2.3.4 Gray Code -- 2.3.5 Unicode -- 2.4 Fixed-Point and Floating-Point Representations -- 2.5 Arithmetic Operations -- 2.5.1 Binary Arithmetic -- 2.5.2 BCD Arithmetic -- 2.5.3 Multiword Binary Addition and Subtraction -- 2.5.4 Binary Multiplication and Division by Shift Operations -- 2.6 Error Correction and Detection -- QUESTIONS AND PROBLEMS Chapter 3: Digital Logic Gates, Boolean Algebra, and Simplification -- 3.1 Basic Logic Operations -- 3.1.1 NOT Operation -- 3.1.2 OR operation -- 3.1.3 AND operation -- 3.2 Other Logic Operations -- 3.2.1 NOR operation -- 3.2.2 NAND operation -- 3.2.3 Exclusive-OR operation (XOR -- 3.2.4 Exclusive-NOR Operation (XNOR -- 3.3 Positive and Negative Logic -- 3.4 Boolean Algebra -- 3.4.1 Boolean Identities -- 3.4.2 Simplification Using Boolean Identities -- 3.4.3 Consensus Theorem -- 3.4.4 Getting Rid of Glitches or Hazards in Combinational Circuits -- 3.4.5 Complement of a Boolean Function 3.5 XOR / XNOR Implementations -- QUESTIONS AND PROBLEMS -- Chapter 4: Minterms, Maxterms, and Karnaugh Map -- 4.1 Standard Representations -- 4.2 Karnaugh Maps -- 4.2.1 Two-Variable K-map -- 4.2.2 Three-Variable K-map -- 4.2.3 Four-Variable K-map -- 4.2.4 Prime Implicants -- 4.2.5 Expressing a Boolean function in Product-of-sums (POS) form using a K-map -- 4.2.6 Don't Care Conditions -- 4.2.7 Five-Variable K-map -- 4.3 Quine-McCluskey Method -- 4.4 Implementation of Digital Circuits with NAND, and NOR Gates -- 4.4.1 NAND Gate Implementation -- 4.4.2 NOR Gate Implementation QUESTIONS AND PROBLEMS -- Chapter 5: Analysis and Design of Combinational Circuits Using Gates -- 5.1 Basic Concepts -- 5.2 Analysis of a Combinational Logic Circuit -- 5.3 Design of Combinational Circuits Using Logic Gates -- 5.4 Multiple-Output Combinational Circuits -- QUESTIONS AND PROBLEMS -- Chapter 6: Design of Typical Combinational Logic Components -- 6.1 Design of Typical Combinational Logic Components -- 6.2 Comparators -- 6.3 Decoders -- 6.4 Encoders -- 6.5 Multiplexers -- 6.6 Demultiplexers -- 6.7 Binary Adder/Subtractor and BCD Adder -- QUESTIONS AND PROBLEMS
650			_aDIGITAL LOGIC
650			_aVERILOG _91217
650			_aFPGA _94449
700	1		_aMcNinch, Steven A. _eauthor. _94450
856	4	0	_uhttps://elibrary.gemzplatform.com/l1sv
942			_2ddc _cPDF
999			_c1727 _d1727